Actel announces IP core generator for its FPGAs 

Posted : 15 Nov 2004

      Actel Corp. has introduced a finite impulse response (FIR) IP core generator optimized for use with the company's flash- and antifuse-based families of FPGAs.

      CoreFIR, the latest addition to Actel's DirectCore portfolio, is an easy-to-use filter generator that uses a distributed arithmetic implementation methodology to create FPGA-based low- and high-pass digital filters for a variety of general signal filtering, detection and analysis functions.

      Designed for lower sampling rates, Actel said, the IP core generator can be implemented in its smallest FPGA devices and provides a level of flexibility and cost-effectiveness that is more attractive than standard processor or ASIC alternatives. CoreFIR generates filters to detect and analyze signals for applications such as radar, sonar, ultrasound and others in the communication, space, medical, industrial and military markets.

     "With programmable logic becoming an attractive alternative to standard DSP processors, CoreFIR offers designers an easy and cost-effective way to implement DSP functionality," shared Yankin Tanurhan, senior director of applications and IP solutions at Actel. "Using the high-performance, highly efficient and easy-to-use core generator, designers can implement digital filters that are customized for their application and reduce development time from weeks to days."

     CoreFIR, designed for Actel's Axcelerator, RTAX-S, SX-A and ProASICPLUS FPGAs, can create FIR filters that operate at more than 160MHz when implemented on the company's antifuse-based Axcelerator devices. Unlike standard DSP solutions, CoreFIR is designed to be small and highly customizable, Actel added. Using the core generator, designers can input the number of taps, bit width and coefficient bit width, and the ratio between system clock frequency and data sampling rate for a variety of configurations, including signed or unsigned inputs, fixed or variable coefficients, and embedded RAM. In addition, the core generator outputs RTL code and a testbench, enabling the designer to verify the specified design configuration.

     The new generator is already available, with pricing starting at $500. In addition, a free evaluation version is available for download via the company's website.